The invention is related to a power MOSFET (metal oxide semiconductor field effect transistor) layout, and more particularly to a power MOSFET layout with protruding portions.
FIG. 1 illustrates the conventional layout for a power MOSFET. The power MOSFET is a trenched field effect transistor and has a plurality of cells. Each cell has a cell body contact region 11, a source region 12, and an insulation layer 13, surrounded by a trenched gate 10. FIG. 2 illustrates the cross-sectional view taken along line A-A′ of FIG. 1. The power MOSFET is formed in the substrate 17. The trenched gate 10 is composed of conductive material isolated from the substrate by a coat of insulation 13. For example, the N type power MOSFET includes a source region 12 formed of N type material, a body 14 formed of P type material, an epitaxial layer 15 formed of lightly doped N type material (N−), and a drain contact layer 16 formed of heavily doped N type material (N+).
The manufacturing of the power MOSFET is first to form the trench by the photolithography etching process, and then to form the insulation layer 13 and the gate electrode 10 in turn. Then, p type dopants are implanted to form the P-body 14. A photo-resist profile is then formed on the substrate 17. The photo-resist profile covers the region 11. Then N type dopants are implanted to form the source region 12. After that the cell body contact region 11 is formed.
However, the photo-resist profile covering the cell body contact region 11 has a plurality of independent islands, which may peel off during the manufacturing process. Accordingly the manufacturing is difficult to perform, and small scale process technology is also difficult to achieve.